PLSense Technology
PLSense provides a unique, revolutionary, and complete generic approach for IoT SoC design that achieves minimum energy per operation for a wide range of frequencies. This is achieved by operating the silicon device at very low voltage. To achieve this PLSense has developed TOPS (True sub-threshold Power Optimized Silicon) technology. TOPS technology continuously monitors the silicon device and minimizes in real time its power consumption– without any intervention from the user. This patented technology enables the introduction of the world first true sub-threshold commercial chip
PLSense technology is applicable for all process technologies. While achieving a dramatic energy savings compared to competitors PLSense designs are more reliable, provide better yield and have a longer lifetime.
Low voltage operation as a key approach for energy reduction
The traditional designs that dominate today's market use supply voltages in the range of 0.9V-1.8V to operate their digital and analog circuits. While this conventional "high voltage" designs are fast and reliable, they dissipate a huge amount of energy and usually are not suitable for IoT applications.
Low voltage operation has been chosen by PLSense as a key approach for energy reduction. Low voltage operation in the "sub-threshold" or "near-threshold" regions has been shown to be the ideal way to dramatically reduce energy dissipation. In sub/near-threshold designs all transistors are operated from the supply voltage which is below or near the transistor switching threshold voltage, as shown in Figure 1.
Figure 1: Transistor states as function of supply voltages
Sub/near threshold operation substantially reduces both leakage and switching (dynamic) energy dissipation, resulting in minimum energy dissipation. This said, since the sub/near threshold currents are much weaker than standard "super-threshold" currents, the time needed to change digital gate states is longer, which limits the operation frequency of the circuit.
PLSense provides a game changing technology that makes low voltage operation practical
Power supply reduction is accompanied by a number of significant challenges, especially in commercial, mass production designs. Lower supply voltages also mean lower noise margins, reduced yield and increased vulnerability to process variations and temperature fluctuations. The characteristics of semiconductor behavior in sub/near-threshold are not well represented by standard transistors models and are different from those in super-threshold region, resulting in different sizing and ratio optimizations.
PLSense provides a complete solution, combining a variety of unique patent-pending technologies at different abstraction levels, including physical, circuit, logic cells, architecture and software. The combination of these technologies makes it possible to overcome the challenges faced by traditional designs. PLSense significantly reduces the sensitivity of low voltage circuits to process and temperature variations and achieves minimum power dissipation for the targeted performance across the wide range of supply voltages (Fig. 2) without sacrificing reliability. PLSense solution includes a full set of digital libraries which are carefully designed and optimized for low voltage operation and are fully compatible with standard manufacturing process and design tools.
Figure 2. PLSense range of operation